\doxysection{stm32h7xx\+\_\+ll\+\_\+lpuart.\+h}
\hypertarget{stm32h7xx__ll__lpuart_8h_source}{}\label{stm32h7xx__ll__lpuart_8h_source}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_lpuart.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_lpuart.h}}
\mbox{\hyperlink{stm32h7xx__ll__lpuart_8h}{Go to the documentation of this file.}}
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\DoxyCodeLine{00021\ \textcolor{preprocessor}{\#define\ STM32H7xx\_LL\_LPUART\_H}}
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\DoxyCodeLine{00072\ \textcolor{preprocessor}{\#define\ LPUART\_BRR\_MIN\_VALUE\ \ \ \ \ \ \ \ \ \ 0x00000300U}\textcolor{preprocessor}{}}
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\DoxyCodeLine{00099\ \ \ uint32\_t\ PrescalerValue;\ \ \ \ \ \ \ \ \ \ \ \ }
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\DoxyCodeLine{00105\ \ \ uint32\_t\ BaudRate;\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
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\DoxyCodeLine{00110\ \ \ uint32\_t\ DataWidth;\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
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\DoxyCodeLine{00116\ \ \ uint32\_t\ StopBits;\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
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\DoxyCodeLine{00122\ \ \ uint32\_t\ Parity;\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
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\DoxyCodeLine{00128\ \ \ uint32\_t\ TransferDirection;\ \ \ \ \ \ \ \ \ }
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\DoxyCodeLine{00134\ \ \ uint32\_t\ HardwareFlowControl;\ \ \ \ \ \ \ }
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\DoxyCodeLine{00140\ \}\ LL\_LPUART\_InitTypeDef;}
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\DoxyCodeLine{00156\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_ICR\_PECF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_ICR\_PECF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
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\DoxyCodeLine{00173\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_ISR\_PE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_ISR\_PE\ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
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\DoxyCodeLine{00290\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_PRESCALER\_DIV32\ \ (USART\_PRESC\_PRESCALER\_3)\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00291\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_PRESCALER\_DIV64\ \ (USART\_PRESC\_PRESCALER\_3\ |\(\backslash\)}}
\DoxyCodeLine{00292\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_PRESC\_PRESCALER\_0)\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00293\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_PRESCALER\_DIV128\ (USART\_PRESC\_PRESCALER\_3\ |\(\backslash\)}}
\DoxyCodeLine{00294\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_PRESC\_PRESCALER\_1)\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00295\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_PRESCALER\_DIV256\ (USART\_PRESC\_PRESCALER\_3\ |\(\backslash\)}}
\DoxyCodeLine{00296\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_PRESC\_PRESCALER\_1\ |\(\backslash\)}}
\DoxyCodeLine{00297\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_PRESC\_PRESCALER\_0)\ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00301\ }
\DoxyCodeLine{00305\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_STOPBITS\_1\ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00306\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_STOPBITS\_2\ \ \ \ \ \ \ \ \ USART\_CR2\_STOP\_1\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00310\ }
\DoxyCodeLine{00314\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_TXRX\_STANDARD\ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00315\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_TXRX\_SWAPPED\ \ \ \ \ \ \ (USART\_CR2\_SWAP)\ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00319\ }
\DoxyCodeLine{00323\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_RXPIN\_LEVEL\_STANDARD\ \ \ 0x00000000U\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00324\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_RXPIN\_LEVEL\_INVERTED\ \ \ (USART\_CR2\_RXINV)\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00328\ }
\DoxyCodeLine{00332\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_TXPIN\_LEVEL\_STANDARD\ \ 0x00000000U\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00333\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_TXPIN\_LEVEL\_INVERTED\ \ (USART\_CR2\_TXINV)\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00337\ }
\DoxyCodeLine{00341\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_BINARY\_LOGIC\_POSITIVE\ 0x00000000U\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00343\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_BINARY\_LOGIC\_NEGATIVE\ USART\_CR2\_DATAINV\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00349\ }
\DoxyCodeLine{00353\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_BITORDER\_LSBFIRST\ 0x00000000U\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00355\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_BITORDER\_MSBFIRST\ USART\_CR2\_MSBFIRST\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00360\ }
\DoxyCodeLine{00364\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_ADDRESS\_DETECT\_4B\ 0x00000000U\ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00365\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_ADDRESS\_DETECT\_7B\ USART\_CR2\_ADDM7\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00369\ }
\DoxyCodeLine{00373\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_HWCONTROL\_NONE\ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00374\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_HWCONTROL\_RTS\ \ \ \ \ USART\_CR3\_RTSE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00376\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_HWCONTROL\_CTS\ \ \ \ \ USART\_CR3\_CTSE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00378\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_HWCONTROL\_RTS\_CTS\ (USART\_CR3\_RTSE\ |\ USART\_CR3\_CTSE)\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00382\ }
\DoxyCodeLine{00386\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_WAKEUP\_ON\_ADDRESS\ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00387\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_WAKEUP\_ON\_STARTBIT\ \ USART\_CR3\_WUS\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00388\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_WAKEUP\_ON\_RXNE\ \ \ \ \ \ (USART\_CR3\_WUS\_0\ |\ USART\_CR3\_WUS\_1)\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00392\ }
\DoxyCodeLine{00396\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_DE\_POLARITY\_HIGH\ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00397\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_DE\_POLARITY\_LOW\ \ \ \ \ \ \ \ \ \ USART\_CR3\_DEP\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00401\ }
\DoxyCodeLine{00405\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_DMA\_REG\_DATA\_TRANSMIT\ \ \ \ 0x00000000U\ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00406\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_DMA\_REG\_DATA\_RECEIVE\ \ \ \ \ 0x00000001U\ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00410\ }
\DoxyCodeLine{00414\ }
\DoxyCodeLine{00415\ \textcolor{comment}{/*\ Exported\ macro\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00419\ }
\DoxyCodeLine{00423\ }
\DoxyCodeLine{00431\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_WriteReg(\_\_INSTANCE\_\_,\ \_\_REG\_\_,\ \_\_VALUE\_\_)\ WRITE\_REG(\_\_INSTANCE\_\_-\/>\_\_REG\_\_,\ (\_\_VALUE\_\_))}}
\DoxyCodeLine{00432\ }
\DoxyCodeLine{00439\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_ReadReg(\_\_INSTANCE\_\_,\ \_\_REG\_\_)\ READ\_REG(\_\_INSTANCE\_\_-\/>\_\_REG\_\_)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00443\ }
\DoxyCodeLine{00447\ }
\DoxyCodeLine{00468\ \textcolor{preprocessor}{\#define\ \_\_LL\_LPUART\_DIV(\_\_PERIPHCLK\_\_,\ \_\_PRESCALER\_\_,\ \_\_BAUDRATE\_\_)\ (uint32\_t)\(\backslash\)}}
\DoxyCodeLine{00469\ \textcolor{preprocessor}{\ \ ((((((uint64\_t)(\_\_PERIPHCLK\_\_)/(uint64\_t)(LPUART\_PRESCALER\_TAB[(uint16\_t)(\_\_PRESCALER\_\_)]))\(\backslash\)}}
\DoxyCodeLine{00470\ \textcolor{preprocessor}{\ \ \ \ \ \ *\ LPUART\_LPUARTDIV\_FREQ\_MUL)\ +\ (uint32\_t)((\_\_BAUDRATE\_\_)/2U))/(\_\_BAUDRATE\_\_))\ \&\ LPUART\_BRR\_MASK)}}
\DoxyCodeLine{00471\ }
\DoxyCodeLine{00475\ }
\DoxyCodeLine{00479\ }
\DoxyCodeLine{00480\ \textcolor{comment}{/*\ Exported\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00484\ }
\DoxyCodeLine{00488\ }
\DoxyCodeLine{00495\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_Enable(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00496\ \{}
\DoxyCodeLine{00497\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bb650676aaae4a5203f372d497d5947}{USART\_CR1\_UE}});}
\DoxyCodeLine{00498\ \}}
\DoxyCodeLine{00499\ }
\DoxyCodeLine{00514\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_Disable(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00515\ \{}
\DoxyCodeLine{00516\ \ \ CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bb650676aaae4a5203f372d497d5947}{USART\_CR1\_UE}});}
\DoxyCodeLine{00517\ \}}
\DoxyCodeLine{00518\ }
\DoxyCodeLine{00525\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabled(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00526\ \{}
\DoxyCodeLine{00527\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bb650676aaae4a5203f372d497d5947}{USART\_CR1\_UE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bb650676aaae4a5203f372d497d5947}{USART\_CR1\_UE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00528\ \}}
\DoxyCodeLine{00529\ }
\DoxyCodeLine{00536\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableFIFO(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00537\ \{}
\DoxyCodeLine{00538\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb5e9fc4111b0159c65811f6a206c192}{USART\_CR1\_FIFOEN}});}
\DoxyCodeLine{00539\ \}}
\DoxyCodeLine{00540\ }
\DoxyCodeLine{00547\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableFIFO(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00548\ \{}
\DoxyCodeLine{00549\ \ \ CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb5e9fc4111b0159c65811f6a206c192}{USART\_CR1\_FIFOEN}});}
\DoxyCodeLine{00550\ \}}
\DoxyCodeLine{00551\ }
\DoxyCodeLine{00558\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledFIFO(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00559\ \{}
\DoxyCodeLine{00560\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb5e9fc4111b0159c65811f6a206c192}{USART\_CR1\_FIFOEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb5e9fc4111b0159c65811f6a206c192}{USART\_CR1\_FIFOEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00561\ \}}
\DoxyCodeLine{00562\ }
\DoxyCodeLine{00576\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetTXFIFOThreshold(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Threshold)}
\DoxyCodeLine{00577\ \{}
\DoxyCodeLine{00578\ \ \ ATOMIC\_MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fcfeb5d260242461009770e93fe5d63}{USART\_CR3\_TXFTCFG}},\ Threshold\ <<\ USART\_CR3\_TXFTCFG\_Pos);}
\DoxyCodeLine{00579\ \}}
\DoxyCodeLine{00580\ }
\DoxyCodeLine{00593\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetTXFIFOThreshold(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00594\ \{}
\DoxyCodeLine{00595\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fcfeb5d260242461009770e93fe5d63}{USART\_CR3\_TXFTCFG}})\ >>\ USART\_CR3\_TXFTCFG\_Pos);}
\DoxyCodeLine{00596\ \}}
\DoxyCodeLine{00597\ }
\DoxyCodeLine{00611\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetRXFIFOThreshold(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Threshold)}
\DoxyCodeLine{00612\ \{}
\DoxyCodeLine{00613\ \ \ ATOMIC\_MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab90e1ecd73a2286ea1e5f056fb2b51d3}{USART\_CR3\_RXFTCFG}},\ Threshold\ <<\ USART\_CR3\_RXFTCFG\_Pos);}
\DoxyCodeLine{00614\ \}}
\DoxyCodeLine{00615\ }
\DoxyCodeLine{00628\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetRXFIFOThreshold(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00629\ \{}
\DoxyCodeLine{00630\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab90e1ecd73a2286ea1e5f056fb2b51d3}{USART\_CR3\_RXFTCFG}})\ >>\ USART\_CR3\_RXFTCFG\_Pos);}
\DoxyCodeLine{00631\ \}}
\DoxyCodeLine{00632\ }
\DoxyCodeLine{00654\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ConfigFIFOsThreshold(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ TXThreshold,\ uint32\_t\ RXThreshold)}
\DoxyCodeLine{00655\ \{}
\DoxyCodeLine{00656\ \ \ ATOMIC\_MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fcfeb5d260242461009770e93fe5d63}{USART\_CR3\_TXFTCFG}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab90e1ecd73a2286ea1e5f056fb2b51d3}{USART\_CR3\_RXFTCFG}},\ (TXThreshold\ <<\ USART\_CR3\_TXFTCFG\_Pos)\ |\ \(\backslash\)}
\DoxyCodeLine{00657\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (RXThreshold\ <<\ USART\_CR3\_RXFTCFG\_Pos));}
\DoxyCodeLine{00658\ \}}
\DoxyCodeLine{00659\ }
\DoxyCodeLine{00668\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableInStopMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00669\ \{}
\DoxyCodeLine{00670\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bf035f3a6674183945975fdda9e5d3a}{USART\_CR1\_UESM}});}
\DoxyCodeLine{00671\ \}}
\DoxyCodeLine{00672\ }
\DoxyCodeLine{00680\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableInStopMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00681\ \{}
\DoxyCodeLine{00682\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bf035f3a6674183945975fdda9e5d3a}{USART\_CR1\_UESM}});}
\DoxyCodeLine{00683\ \}}
\DoxyCodeLine{00684\ }
\DoxyCodeLine{00692\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledInStopMode(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00693\ \{}
\DoxyCodeLine{00694\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bf035f3a6674183945975fdda9e5d3a}{USART\_CR1\_UESM}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bf035f3a6674183945975fdda9e5d3a}{USART\_CR1\_UESM}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00695\ \}}
\DoxyCodeLine{00696\ }
\DoxyCodeLine{00703\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableDirectionRx(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00704\ \{}
\DoxyCodeLine{00705\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gada0d5d407a22264de847bc1b40a17aeb}{USART\_CR1\_RE}});}
\DoxyCodeLine{00706\ \}}
\DoxyCodeLine{00707\ }
\DoxyCodeLine{00714\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableDirectionRx(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00715\ \{}
\DoxyCodeLine{00716\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gada0d5d407a22264de847bc1b40a17aeb}{USART\_CR1\_RE}});}
\DoxyCodeLine{00717\ \}}
\DoxyCodeLine{00718\ }
\DoxyCodeLine{00725\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableDirectionTx(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00726\ \{}
\DoxyCodeLine{00727\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade7f090b04fd78b755b43357ecaa9622}{USART\_CR1\_TE}});}
\DoxyCodeLine{00728\ \}}
\DoxyCodeLine{00729\ }
\DoxyCodeLine{00736\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableDirectionTx(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00737\ \{}
\DoxyCodeLine{00738\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade7f090b04fd78b755b43357ecaa9622}{USART\_CR1\_TE}});}
\DoxyCodeLine{00739\ \}}
\DoxyCodeLine{00740\ }
\DoxyCodeLine{00754\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetTransferDirection(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ TransferDirection)}
\DoxyCodeLine{00755\ \{}
\DoxyCodeLine{00756\ \ \ ATOMIC\_MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gada0d5d407a22264de847bc1b40a17aeb}{USART\_CR1\_RE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade7f090b04fd78b755b43357ecaa9622}{USART\_CR1\_TE}},\ TransferDirection);}
\DoxyCodeLine{00757\ \}}
\DoxyCodeLine{00758\ }
\DoxyCodeLine{00770\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetTransferDirection(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00771\ \{}
\DoxyCodeLine{00772\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gada0d5d407a22264de847bc1b40a17aeb}{USART\_CR1\_RE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade7f090b04fd78b755b43357ecaa9622}{USART\_CR1\_TE}}));}
\DoxyCodeLine{00773\ \}}
\DoxyCodeLine{00774\ }
\DoxyCodeLine{00789\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetParity(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Parity)}
\DoxyCodeLine{00790\ \{}
\DoxyCodeLine{00791\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e159d36ab2c93a2c1942df60e9eebbe}{USART\_CR1\_PS}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\_CR1\_PCE}},\ Parity);}
\DoxyCodeLine{00792\ \}}
\DoxyCodeLine{00793\ }
\DoxyCodeLine{00804\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetParity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00805\ \{}
\DoxyCodeLine{00806\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e159d36ab2c93a2c1942df60e9eebbe}{USART\_CR1\_PS}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\_CR1\_PCE}}));}
\DoxyCodeLine{00807\ \}}
\DoxyCodeLine{00808\ }
\DoxyCodeLine{00818\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetWakeUpMethod(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Method)}
\DoxyCodeLine{00819\ \{}
\DoxyCodeLine{00820\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad831dfc169fcf14b7284984dbecf322d}{USART\_CR1\_WAKE}},\ Method);}
\DoxyCodeLine{00821\ \}}
\DoxyCodeLine{00822\ }
\DoxyCodeLine{00831\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetWakeUpMethod(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00832\ \{}
\DoxyCodeLine{00833\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad831dfc169fcf14b7284984dbecf322d}{USART\_CR1\_WAKE}}));}
\DoxyCodeLine{00834\ \}}
\DoxyCodeLine{00835\ }
\DoxyCodeLine{00846\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetDataWidth(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ DataWidth)}
\DoxyCodeLine{00847\ \{}
\DoxyCodeLine{00848\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga95f0288b9c6aaeca7cb6550a2e6833e2}{USART\_CR1\_M}},\ DataWidth);}
\DoxyCodeLine{00849\ \}}
\DoxyCodeLine{00850\ }
\DoxyCodeLine{00860\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetDataWidth(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00861\ \{}
\DoxyCodeLine{00862\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga95f0288b9c6aaeca7cb6550a2e6833e2}{USART\_CR1\_M}}));}
\DoxyCodeLine{00863\ \}}
\DoxyCodeLine{00864\ }
\DoxyCodeLine{00871\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableMuteMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00872\ \{}
\DoxyCodeLine{00873\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4ae32b0c22f90fa8295d2ed96c2fd54d}{USART\_CR1\_MME}});}
\DoxyCodeLine{00874\ \}}
\DoxyCodeLine{00875\ }
\DoxyCodeLine{00882\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableMuteMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00883\ \{}
\DoxyCodeLine{00884\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4ae32b0c22f90fa8295d2ed96c2fd54d}{USART\_CR1\_MME}});}
\DoxyCodeLine{00885\ \}}
\DoxyCodeLine{00886\ }
\DoxyCodeLine{00893\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledMuteMode(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00894\ \{}
\DoxyCodeLine{00895\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4ae32b0c22f90fa8295d2ed96c2fd54d}{USART\_CR1\_MME}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4ae32b0c22f90fa8295d2ed96c2fd54d}{USART\_CR1\_MME}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00896\ \}}
\DoxyCodeLine{00897\ }
\DoxyCodeLine{00917\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetPrescaler(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ PrescalerValue)}
\DoxyCodeLine{00918\ \{}
\DoxyCodeLine{00919\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_abe251663891063ada5a08d269c1d71a2}{PRESC}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga232a983aab5682e588622a06c176ebfa}{USART\_PRESC\_PRESCALER}},\ (uint16\_t)PrescalerValue);}
\DoxyCodeLine{00920\ \}}
\DoxyCodeLine{00921\ }
\DoxyCodeLine{00940\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetPrescaler(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00941\ \{}
\DoxyCodeLine{00942\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_abe251663891063ada5a08d269c1d71a2}{PRESC}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga232a983aab5682e588622a06c176ebfa}{USART\_PRESC\_PRESCALER}}));}
\DoxyCodeLine{00943\ \}}
\DoxyCodeLine{00944\ }
\DoxyCodeLine{00954\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetStopBitsLength(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ StopBits)}
\DoxyCodeLine{00955\ \{}
\DoxyCodeLine{00956\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf993e483318ebcecffd18649de766dc6}{USART\_CR2\_STOP}},\ StopBits);}
\DoxyCodeLine{00957\ \}}
\DoxyCodeLine{00958\ }
\DoxyCodeLine{00967\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetStopBitsLength(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{00968\ \{}
\DoxyCodeLine{00969\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf993e483318ebcecffd18649de766dc6}{USART\_CR2\_STOP}}));}
\DoxyCodeLine{00970\ \}}
\DoxyCodeLine{00971\ }
\DoxyCodeLine{00996\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ConfigCharacter(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ DataWidth,\ uint32\_t\ Parity,}
\DoxyCodeLine{00997\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ StopBits)}
\DoxyCodeLine{00998\ \{}
\DoxyCodeLine{00999\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e159d36ab2c93a2c1942df60e9eebbe}{USART\_CR1\_PS}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\_CR1\_PCE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga95f0288b9c6aaeca7cb6550a2e6833e2}{USART\_CR1\_M}},\ Parity\ |\ DataWidth);}
\DoxyCodeLine{01000\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf993e483318ebcecffd18649de766dc6}{USART\_CR2\_STOP}},\ StopBits);}
\DoxyCodeLine{01001\ \}}
\DoxyCodeLine{01002\ }
\DoxyCodeLine{01012\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetTXRXSwap(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ SwapConfig)}
\DoxyCodeLine{01013\ \{}
\DoxyCodeLine{01014\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4aecba5721df1c1adb6d0264625accad}{USART\_CR2\_SWAP}},\ SwapConfig);}
\DoxyCodeLine{01015\ \}}
\DoxyCodeLine{01016\ }
\DoxyCodeLine{01025\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetTXRXSwap(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01026\ \{}
\DoxyCodeLine{01027\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4aecba5721df1c1adb6d0264625accad}{USART\_CR2\_SWAP}}));}
\DoxyCodeLine{01028\ \}}
\DoxyCodeLine{01029\ }
\DoxyCodeLine{01039\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetRXPinLevel(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ PinInvMethod)}
\DoxyCodeLine{01040\ \{}
\DoxyCodeLine{01041\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafff10115e1adb07c00f42627cedf01e5}{USART\_CR2\_RXINV}},\ PinInvMethod);}
\DoxyCodeLine{01042\ \}}
\DoxyCodeLine{01043\ }
\DoxyCodeLine{01052\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetRXPinLevel(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01053\ \{}
\DoxyCodeLine{01054\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafff10115e1adb07c00f42627cedf01e5}{USART\_CR2\_RXINV}}));}
\DoxyCodeLine{01055\ \}}
\DoxyCodeLine{01056\ }
\DoxyCodeLine{01066\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetTXPinLevel(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ PinInvMethod)}
\DoxyCodeLine{01067\ \{}
\DoxyCodeLine{01068\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gadc2ad93cdc6d8f138f455a2fb671a211}{USART\_CR2\_TXINV}},\ PinInvMethod);}
\DoxyCodeLine{01069\ \}}
\DoxyCodeLine{01070\ }
\DoxyCodeLine{01079\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetTXPinLevel(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01080\ \{}
\DoxyCodeLine{01081\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gadc2ad93cdc6d8f138f455a2fb671a211}{USART\_CR2\_TXINV}}));}
\DoxyCodeLine{01082\ \}}
\DoxyCodeLine{01083\ }
\DoxyCodeLine{01096\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetBinaryDataLogic(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ DataLogic)}
\DoxyCodeLine{01097\ \{}
\DoxyCodeLine{01098\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8f743bbd3df209bd1d434b17e08a78fe}{USART\_CR2\_DATAINV}},\ DataLogic);}
\DoxyCodeLine{01099\ \}}
\DoxyCodeLine{01100\ }
\DoxyCodeLine{01109\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetBinaryDataLogic(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01110\ \{}
\DoxyCodeLine{01111\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8f743bbd3df209bd1d434b17e08a78fe}{USART\_CR2\_DATAINV}}));}
\DoxyCodeLine{01112\ \}}
\DoxyCodeLine{01113\ }
\DoxyCodeLine{01125\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetTransferBitOrder(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ BitOrder)}
\DoxyCodeLine{01126\ \{}
\DoxyCodeLine{01127\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7342ab16574cebf157aa885a79986812}{USART\_CR2\_MSBFIRST}},\ BitOrder);}
\DoxyCodeLine{01128\ \}}
\DoxyCodeLine{01129\ }
\DoxyCodeLine{01140\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetTransferBitOrder(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01141\ \{}
\DoxyCodeLine{01142\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7342ab16574cebf157aa885a79986812}{USART\_CR2\_MSBFIRST}}));}
\DoxyCodeLine{01143\ \}}
\DoxyCodeLine{01144\ }
\DoxyCodeLine{01168\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ConfigNodeAddress(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ AddressLen,\ uint32\_t\ NodeAddress)}
\DoxyCodeLine{01169\ \{}
\DoxyCodeLine{01170\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3ee77fac25142271ad56d49685e518b3}{USART\_CR2\_ADD}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2d8588feb26d8b36054a060d6b691823}{USART\_CR2\_ADDM7}},}
\DoxyCodeLine{01171\ \ \ \ \ \ \ \ \ \ \ \ \ \ (uint32\_t)(AddressLen\ |\ (NodeAddress\ <<\ USART\_CR2\_ADD\_Pos)));}
\DoxyCodeLine{01172\ \}}
\DoxyCodeLine{01173\ }
\DoxyCodeLine{01184\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetNodeAddress(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01185\ \{}
\DoxyCodeLine{01186\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3ee77fac25142271ad56d49685e518b3}{USART\_CR2\_ADD}})\ >>\ USART\_CR2\_ADD\_Pos);}
\DoxyCodeLine{01187\ \}}
\DoxyCodeLine{01188\ }
\DoxyCodeLine{01197\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetNodeAddressLen(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01198\ \{}
\DoxyCodeLine{01199\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2d8588feb26d8b36054a060d6b691823}{USART\_CR2\_ADDM7}}));}
\DoxyCodeLine{01200\ \}}
\DoxyCodeLine{01201\ }
\DoxyCodeLine{01208\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableRTSHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01209\ \{}
\DoxyCodeLine{01210\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7c5d6fcd84a4728cda578a0339b4cac2}{USART\_CR3\_RTSE}});}
\DoxyCodeLine{01211\ \}}
\DoxyCodeLine{01212\ }
\DoxyCodeLine{01219\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableRTSHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01220\ \{}
\DoxyCodeLine{01221\ \ \ CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7c5d6fcd84a4728cda578a0339b4cac2}{USART\_CR3\_RTSE}});}
\DoxyCodeLine{01222\ \}}
\DoxyCodeLine{01223\ }
\DoxyCodeLine{01230\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableCTSHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01231\ \{}
\DoxyCodeLine{01232\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa125f026b1ca2d76eab48b191baed265}{USART\_CR3\_CTSE}});}
\DoxyCodeLine{01233\ \}}
\DoxyCodeLine{01234\ }
\DoxyCodeLine{01241\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableCTSHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01242\ \{}
\DoxyCodeLine{01243\ \ \ CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa125f026b1ca2d76eab48b191baed265}{USART\_CR3\_CTSE}});}
\DoxyCodeLine{01244\ \}}
\DoxyCodeLine{01245\ }
\DoxyCodeLine{01258\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ HardwareFlowControl)}
\DoxyCodeLine{01259\ \{}
\DoxyCodeLine{01260\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7c5d6fcd84a4728cda578a0339b4cac2}{USART\_CR3\_RTSE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa125f026b1ca2d76eab48b191baed265}{USART\_CR3\_CTSE}},\ HardwareFlowControl);}
\DoxyCodeLine{01261\ \}}
\DoxyCodeLine{01262\ }
\DoxyCodeLine{01274\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetHWFlowCtrl(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01275\ \{}
\DoxyCodeLine{01276\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7c5d6fcd84a4728cda578a0339b4cac2}{USART\_CR3\_RTSE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa125f026b1ca2d76eab48b191baed265}{USART\_CR3\_CTSE}}));}
\DoxyCodeLine{01277\ \}}
\DoxyCodeLine{01278\ }
\DoxyCodeLine{01285\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableOverrunDetect(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01286\ \{}
\DoxyCodeLine{01287\ \ \ CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga33d63c7953788124179cd18a8890a91a}{USART\_CR3\_OVRDIS}});}
\DoxyCodeLine{01288\ \}}
\DoxyCodeLine{01289\ }
\DoxyCodeLine{01296\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableOverrunDetect(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01297\ \{}
\DoxyCodeLine{01298\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga33d63c7953788124179cd18a8890a91a}{USART\_CR3\_OVRDIS}});}
\DoxyCodeLine{01299\ \}}
\DoxyCodeLine{01300\ }
\DoxyCodeLine{01307\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledOverrunDetect(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01308\ \{}
\DoxyCodeLine{01309\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga33d63c7953788124179cd18a8890a91a}{USART\_CR3\_OVRDIS}})\ !=\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga33d63c7953788124179cd18a8890a91a}{USART\_CR3\_OVRDIS}})\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01310\ \}}
\DoxyCodeLine{01311\ }
\DoxyCodeLine{01322\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetWKUPType(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Type)}
\DoxyCodeLine{01323\ \{}
\DoxyCodeLine{01324\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga76d102b464f15cbe18b0d83b61150293}{USART\_CR3\_WUS}},\ Type);}
\DoxyCodeLine{01325\ \}}
\DoxyCodeLine{01326\ }
\DoxyCodeLine{01336\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetWKUPType(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01337\ \{}
\DoxyCodeLine{01338\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga76d102b464f15cbe18b0d83b61150293}{USART\_CR3\_WUS}}));}
\DoxyCodeLine{01339\ \}}
\DoxyCodeLine{01340\ }
\DoxyCodeLine{01370\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetBaudRate(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ PeriphClk,\ uint32\_t\ PrescalerValue,}
\DoxyCodeLine{01371\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ BaudRate)}
\DoxyCodeLine{01372\ \{}
\DoxyCodeLine{01373\ \ \ \textcolor{keywordflow}{if}\ (BaudRate\ !=\ 0U)}
\DoxyCodeLine{01374\ \ \ \{}
\DoxyCodeLine{01375\ \ \ \ \ LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6ef06ba9d8dc2dc2a0855766369fa7c9}{BRR}}\ =\ \_\_LL\_LPUART\_DIV(PeriphClk,\ PrescalerValue,\ BaudRate);}
\DoxyCodeLine{01376\ \ \ \}}
\DoxyCodeLine{01377\ \}}
\DoxyCodeLine{01378\ }
\DoxyCodeLine{01401\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetBaudRate(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ PeriphClk,}
\DoxyCodeLine{01402\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ PrescalerValue)}
\DoxyCodeLine{01403\ \{}
\DoxyCodeLine{01404\ \ \ uint32\_t\ lpuartdiv;}
\DoxyCodeLine{01405\ \ \ uint32\_t\ brrresult;}
\DoxyCodeLine{01406\ \ \ uint32\_t\ periphclkpresc\ =\ (uint32\_t)(PeriphClk\ /\ (LPUART\_PRESCALER\_TAB[(uint16\_t)PrescalerValue]));}
\DoxyCodeLine{01407\ }
\DoxyCodeLine{01408\ \ \ lpuartdiv\ =\ LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6ef06ba9d8dc2dc2a0855766369fa7c9}{BRR}}\ \&\ LPUART\_BRR\_MASK;}
\DoxyCodeLine{01409\ }
\DoxyCodeLine{01410\ \ \ \textcolor{keywordflow}{if}\ (lpuartdiv\ >=\ LPUART\_BRR\_MIN\_VALUE)}
\DoxyCodeLine{01411\ \ \ \{}
\DoxyCodeLine{01412\ \ \ \ \ brrresult\ =\ (uint32\_t)(((uint64\_t)(periphclkpresc)\ *\ LPUART\_LPUARTDIV\_FREQ\_MUL)\ /\ lpuartdiv);}
\DoxyCodeLine{01413\ \ \ \}}
\DoxyCodeLine{01414\ \ \ \textcolor{keywordflow}{else}}
\DoxyCodeLine{01415\ \ \ \{}
\DoxyCodeLine{01416\ \ \ \ \ brrresult\ =\ 0x0UL;}
\DoxyCodeLine{01417\ \ \ \}}
\DoxyCodeLine{01418\ }
\DoxyCodeLine{01419\ \ \ \textcolor{keywordflow}{return}\ (brrresult);}
\DoxyCodeLine{01420\ \}}
\DoxyCodeLine{01421\ }
\DoxyCodeLine{01425\ }
\DoxyCodeLine{01429\ }
\DoxyCodeLine{01436\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableHalfDuplex(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01437\ \{}
\DoxyCodeLine{01438\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}});}
\DoxyCodeLine{01439\ \}}
\DoxyCodeLine{01440\ }
\DoxyCodeLine{01447\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableHalfDuplex(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01448\ \{}
\DoxyCodeLine{01449\ \ \ CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}});}
\DoxyCodeLine{01450\ \}}
\DoxyCodeLine{01451\ }
\DoxyCodeLine{01458\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledHalfDuplex(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01459\ \{}
\DoxyCodeLine{01460\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01461\ \}}
\DoxyCodeLine{01462\ }
\DoxyCodeLine{01466\ }
\DoxyCodeLine{01470\ }
\DoxyCodeLine{01478\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetDEDeassertionTime(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Time)}
\DoxyCodeLine{01479\ \{}
\DoxyCodeLine{01480\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab2d95af966e08146e1172c4b828bda38}{USART\_CR1\_DEDT}},\ Time\ <<\ USART\_CR1\_DEDT\_Pos);}
\DoxyCodeLine{01481\ \}}
\DoxyCodeLine{01482\ }
\DoxyCodeLine{01489\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetDEDeassertionTime(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01490\ \{}
\DoxyCodeLine{01491\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab2d95af966e08146e1172c4b828bda38}{USART\_CR1\_DEDT}})\ >>\ USART\_CR1\_DEDT\_Pos);}
\DoxyCodeLine{01492\ \}}
\DoxyCodeLine{01493\ }
\DoxyCodeLine{01501\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetDEAssertionTime(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Time)}
\DoxyCodeLine{01502\ \{}
\DoxyCodeLine{01503\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6bdc2e80e4545996ecb5901915d13e28}{USART\_CR1\_DEAT}},\ Time\ <<\ USART\_CR1\_DEAT\_Pos);}
\DoxyCodeLine{01504\ \}}
\DoxyCodeLine{01505\ }
\DoxyCodeLine{01512\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetDEAssertionTime(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01513\ \{}
\DoxyCodeLine{01514\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6bdc2e80e4545996ecb5901915d13e28}{USART\_CR1\_DEAT}})\ >>\ USART\_CR1\_DEAT\_Pos);}
\DoxyCodeLine{01515\ \}}
\DoxyCodeLine{01516\ }
\DoxyCodeLine{01523\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableDEMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01524\ \{}
\DoxyCodeLine{01525\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd65f9fd10ee8e99db1118828deb0441}{USART\_CR3\_DEM}});}
\DoxyCodeLine{01526\ \}}
\DoxyCodeLine{01527\ }
\DoxyCodeLine{01534\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableDEMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01535\ \{}
\DoxyCodeLine{01536\ \ \ CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd65f9fd10ee8e99db1118828deb0441}{USART\_CR3\_DEM}});}
\DoxyCodeLine{01537\ \}}
\DoxyCodeLine{01538\ }
\DoxyCodeLine{01545\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledDEMode(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01546\ \{}
\DoxyCodeLine{01547\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd65f9fd10ee8e99db1118828deb0441}{USART\_CR3\_DEM}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd65f9fd10ee8e99db1118828deb0441}{USART\_CR3\_DEM}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01548\ \}}
\DoxyCodeLine{01549\ }
\DoxyCodeLine{01559\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_SetDESignalPolarity(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Polarity)}
\DoxyCodeLine{01560\ \{}
\DoxyCodeLine{01561\ \ \ MODIFY\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2000c42015289291da1c58fe27800d64}{USART\_CR3\_DEP}},\ Polarity);}
\DoxyCodeLine{01562\ \}}
\DoxyCodeLine{01563\ }
\DoxyCodeLine{01572\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_GetDESignalPolarity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01573\ \{}
\DoxyCodeLine{01574\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2000c42015289291da1c58fe27800d64}{USART\_CR3\_DEP}}));}
\DoxyCodeLine{01575\ \}}
\DoxyCodeLine{01576\ }
\DoxyCodeLine{01580\ }
\DoxyCodeLine{01584\ }
\DoxyCodeLine{01591\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_PE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01592\ \{}
\DoxyCodeLine{01593\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa10e69d231b67d698ab59db3d338baa6}{USART\_ISR\_PE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa10e69d231b67d698ab59db3d338baa6}{USART\_ISR\_PE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01594\ \}}
\DoxyCodeLine{01595\ }
\DoxyCodeLine{01602\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_FE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01603\ \{}
\DoxyCodeLine{01604\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga27cc4dfb6d5e817a69c80471b87deb4b}{USART\_ISR\_FE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga27cc4dfb6d5e817a69c80471b87deb4b}{USART\_ISR\_FE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01605\ \}}
\DoxyCodeLine{01606\ }
\DoxyCodeLine{01613\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_NE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01614\ \{}
\DoxyCodeLine{01615\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga09c7d19477a091689f50bd0ef5b6a3d8}{USART\_ISR\_NE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga09c7d19477a091689f50bd0ef5b6a3d8}{USART\_ISR\_NE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01616\ \}}
\DoxyCodeLine{01617\ }
\DoxyCodeLine{01624\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_ORE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01625\ \{}
\DoxyCodeLine{01626\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9e5b4a08e3655bed8ec3022947cfc542}{USART\_ISR\_ORE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9e5b4a08e3655bed8ec3022947cfc542}{USART\_ISR\_ORE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01627\ \}}
\DoxyCodeLine{01628\ }
\DoxyCodeLine{01635\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_IDLE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01636\ \{}
\DoxyCodeLine{01637\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacee745b19e0a6073280d234fdc96e627}{USART\_ISR\_IDLE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacee745b19e0a6073280d234fdc96e627}{USART\_ISR\_IDLE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01638\ \}}
\DoxyCodeLine{01639\ }
\DoxyCodeLine{01640\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_IsActiveFlag\_RXNE\ \ LL\_LPUART\_IsActiveFlag\_RXNE\_RXFNE\ }\textcolor{comment}{/*\ Redefinition\ for\ legacy\ purpose\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01641\ }
\DoxyCodeLine{01648\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_RXNE\_RXFNE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01649\ \{}
\DoxyCodeLine{01650\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gabe52544cefa3642d3d1b3db7473bdbf2}{USART\_ISR\_RXNE\_RXFNE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gabe52544cefa3642d3d1b3db7473bdbf2}{USART\_ISR\_RXNE\_RXFNE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01651\ \}}
\DoxyCodeLine{01652\ }
\DoxyCodeLine{01659\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_TC(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01660\ \{}
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\DoxyCodeLine{01662\ \}}
\DoxyCodeLine{01663\ }
\DoxyCodeLine{01664\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_IsActiveFlag\_TXE\ \ LL\_LPUART\_IsActiveFlag\_TXE\_TXFNF\ }\textcolor{comment}{/*\ Redefinition\ for\ legacy\ purpose\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01665\ }
\DoxyCodeLine{01672\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_TXE\_TXFNF(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{01676\ }
\DoxyCodeLine{01683\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_nCTS(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01684\ \{}
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\DoxyCodeLine{01686\ \}}
\DoxyCodeLine{01687\ }
\DoxyCodeLine{01694\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_CTS(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01695\ \{}
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\DoxyCodeLine{01697\ \}}
\DoxyCodeLine{01698\ }
\DoxyCodeLine{01705\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_BUSY(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01706\ \{}
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\DoxyCodeLine{01708\ \}}
\DoxyCodeLine{01709\ }
\DoxyCodeLine{01716\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_CM(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01717\ \{}
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\DoxyCodeLine{01719\ \}}
\DoxyCodeLine{01720\ }
\DoxyCodeLine{01727\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_SBK(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01728\ \{}
\DoxyCodeLine{01729\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga74aecf8406973a8fd5c02615d8a7b2d1}{USART\_ISR\_SBKF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga74aecf8406973a8fd5c02615d8a7b2d1}{USART\_ISR\_SBKF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01730\ \}}
\DoxyCodeLine{01731\ }
\DoxyCodeLine{01738\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_RWU(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01739\ \{}
\DoxyCodeLine{01740\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0df19201dd47f3bd43954621c88ef4a3}{USART\_ISR\_RWU}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0df19201dd47f3bd43954621c88ef4a3}{USART\_ISR\_RWU}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01741\ \}}
\DoxyCodeLine{01742\ }
\DoxyCodeLine{01749\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_WKUP(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01750\ \{}
\DoxyCodeLine{01751\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad8ea420fd72b3f22e3ae5c22242c6b72}{USART\_ISR\_WUF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad8ea420fd72b3f22e3ae5c22242c6b72}{USART\_ISR\_WUF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01752\ \}}
\DoxyCodeLine{01753\ }
\DoxyCodeLine{01760\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_TEACK(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01761\ \{}
\DoxyCodeLine{01762\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf1433ae77d20ec6da645117cde536f81}{USART\_ISR\_TEACK}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf1433ae77d20ec6da645117cde536f81}{USART\_ISR\_TEACK}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01763\ \}}
\DoxyCodeLine{01764\ }
\DoxyCodeLine{01771\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_REACK(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01772\ \{}
\DoxyCodeLine{01773\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa513c61dd111de0945d8dd0778e70ad5}{USART\_ISR\_REACK}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa513c61dd111de0945d8dd0778e70ad5}{USART\_ISR\_REACK}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01774\ \}}
\DoxyCodeLine{01775\ }
\DoxyCodeLine{01782\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_TXFE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01783\ \{}
\DoxyCodeLine{01784\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf322143841cafcdbc2f46b0a99c8c7c5}{USART\_ISR\_TXFE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf322143841cafcdbc2f46b0a99c8c7c5}{USART\_ISR\_TXFE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01785\ \}}
\DoxyCodeLine{01786\ }
\DoxyCodeLine{01793\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_RXFF(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01794\ \{}
\DoxyCodeLine{01795\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaaf5a3b29c38098274947c0b8782997f}{USART\_ISR\_RXFF}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaaf5a3b29c38098274947c0b8782997f}{USART\_ISR\_RXFF}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01796\ \}}
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\DoxyCodeLine{01804\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_TXFT(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01805\ \{}
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\DoxyCodeLine{01807\ \}}
\DoxyCodeLine{01808\ }
\DoxyCodeLine{01815\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsActiveFlag\_RXFT(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01816\ \{}
\DoxyCodeLine{01817\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae7ab0ae314fb7a4b72f5cfa9ea870673}{USART\_ISR\_RXFT}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae7ab0ae314fb7a4b72f5cfa9ea870673}{USART\_ISR\_RXFT}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01818\ \}}
\DoxyCodeLine{01819\ }
\DoxyCodeLine{01826\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_PE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01827\ \{}
\DoxyCodeLine{01828\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga404185136eb68f679e82e0187d66e411}{USART\_ICR\_PECF}});}
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\DoxyCodeLine{01830\ }
\DoxyCodeLine{01837\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_FE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01838\ \{}
\DoxyCodeLine{01839\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8400b4500c41800e5f18fc7291a64c9f}{USART\_ICR\_FECF}});}
\DoxyCodeLine{01840\ \}}
\DoxyCodeLine{01841\ }
\DoxyCodeLine{01848\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_NE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01849\ \{}
\DoxyCodeLine{01850\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac93fffe176d75c707e6bef9d15406331}{USART\_ICR\_NECF}});}
\DoxyCodeLine{01851\ \}}
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\DoxyCodeLine{01859\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_ORE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01860\ \{}
\DoxyCodeLine{01861\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga375f76b0670ffeb5d2691592d9e7c422}{USART\_ICR\_ORECF}});}
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\DoxyCodeLine{01870\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_IDLE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01871\ \{}
\DoxyCodeLine{01872\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9d4d7675c0d36ce4347c3509d27c0760}{USART\_ICR\_IDLECF}});}
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\DoxyCodeLine{01874\ }
\DoxyCodeLine{01881\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_TC(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01882\ \{}
\DoxyCodeLine{01883\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacf92ea54425a962dde662b10b61d0250}{USART\_ICR\_TCCF}});}
\DoxyCodeLine{01884\ \}}
\DoxyCodeLine{01885\ }
\DoxyCodeLine{01892\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_nCTS(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01893\ \{}
\DoxyCodeLine{01894\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8a630d4a5e4ce10ad6fdb9da47126f4f}{USART\_ICR\_CTSCF}});}
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\DoxyCodeLine{01903\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_CM(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01904\ \{}
\DoxyCodeLine{01905\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5478360c2639166c4d645b64cbf371be}{USART\_ICR\_CMCF}});}
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\DoxyCodeLine{01914\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_ClearFlag\_WKUP(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01915\ \{}
\DoxyCodeLine{01916\ \ \ WRITE\_REG(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ab6d6dd2af5463e9e3df458557e09f6cf}{ICR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0526db5696016ae784e46b80027044fa}{USART\_ICR\_WUCF}});}
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\DoxyCodeLine{01933\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_IDLE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01934\ \{}
\DoxyCodeLine{01935\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5221d09eebd12445a20f221bf98066f8}{USART\_CR1\_IDLEIE}});}
\DoxyCodeLine{01936\ \}}
\DoxyCodeLine{01937\ }
\DoxyCodeLine{01938\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_EnableIT\_RXNE\ \ LL\_LPUART\_EnableIT\_RXNE\_RXFNE\ }\textcolor{comment}{/*\ Redefinition\ for\ legacy\ purpose\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01939\ }
\DoxyCodeLine{01946\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_RXNE\_RXFNE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01947\ \{}
\DoxyCodeLine{01948\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8342cbdabe2a5ae03ee73452a9ebf935}{USART\_CR1\_RXNEIE\_RXFNEIE}});}
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\DoxyCodeLine{01957\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_TC(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01958\ \{}
\DoxyCodeLine{01959\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa17130690a1ca95b972429eb64d4254e}{USART\_CR1\_TCIE}});}
\DoxyCodeLine{01960\ \}}
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\DoxyCodeLine{01962\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_EnableIT\_TXE\ \ LL\_LPUART\_EnableIT\_TXE\_TXFNF\ }\textcolor{comment}{/*\ Redefinition\ for\ legacy\ purpose\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01963\ }
\DoxyCodeLine{01970\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_TXE\_TXFNF(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01971\ \{}
\DoxyCodeLine{01972\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga91ad128d8b96d94461290e19164bbfc3}{USART\_CR1\_TXEIE\_TXFNFIE}});}
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\DoxyCodeLine{01981\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_PE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{01982\ \{}
\DoxyCodeLine{01983\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga27405d413b6d355ccdb076d52fef6875}{USART\_CR1\_PEIE}});}
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\DoxyCodeLine{01985\ }
\DoxyCodeLine{01992\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_CM(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{01994\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaac6e25c121fc78142f8866809bc98aaa}{USART\_CR1\_CMIE}});}
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\DoxyCodeLine{02003\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_TXFE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02004\ \{}
\DoxyCodeLine{02005\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab80e139b33533a335a75c58ef2e3ca3c}{USART\_CR1\_TXFEIE}});}
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\DoxyCodeLine{02014\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_RXFF(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02016\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6d438200ec45e5fe92171128fcf48437}{USART\_CR1\_RXFFIE}});}
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\DoxyCodeLine{02029\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_ERROR(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02030\ \{}
\DoxyCodeLine{02031\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaed1a39c551b1641128f81893ff558d0}{USART\_CR3\_EIE}});}
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\DoxyCodeLine{02040\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_CTS(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02041\ \{}
\DoxyCodeLine{02042\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga636d5ec2e9556949fc68d13ad45a1e90}{USART\_CR3\_CTSIE}});}
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\DoxyCodeLine{02051\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_WKUP(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02052\ \{}
\DoxyCodeLine{02053\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8006ca5d160f9805977f2c77f146a75c}{USART\_CR3\_WUFIE}});}
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\DoxyCodeLine{02064\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga55ca97ca5a14b5dfd06424324a35550f}{USART\_CR3\_TXFTIE}});}
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\DoxyCodeLine{02073\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableIT\_RXFT(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02075\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga49fc035fafb880dadb6a60fdf2ba8795}{USART\_CR3\_RXFTIE}});}
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\DoxyCodeLine{02084\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_IDLE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02086\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5221d09eebd12445a20f221bf98066f8}{USART\_CR1\_IDLEIE}});}
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\DoxyCodeLine{02089\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_DisableIT\_RXNE\ \ LL\_LPUART\_DisableIT\_RXNE\_RXFNE\ }\textcolor{comment}{/*\ Redefinition\ for\ legacy\ purpose\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02097\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_RXNE\_RXFNE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02099\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8342cbdabe2a5ae03ee73452a9ebf935}{USART\_CR1\_RXNEIE\_RXFNEIE}});}
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\DoxyCodeLine{02108\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_TC(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02113\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_DisableIT\_TXE\ \ LL\_LPUART\_DisableIT\_TXE\_TXFNF\ }\textcolor{comment}{/*\ Redefinition\ for\ legacy\ purpose\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02121\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_TXE\_TXFNF(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02123\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga91ad128d8b96d94461290e19164bbfc3}{USART\_CR1\_TXEIE\_TXFNFIE}});}
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\DoxyCodeLine{02132\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_PE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02134\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga27405d413b6d355ccdb076d52fef6875}{USART\_CR1\_PEIE}});}
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\DoxyCodeLine{02143\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_CM(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02154\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_TXFE(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02156\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab80e139b33533a335a75c58ef2e3ca3c}{USART\_CR1\_TXFEIE}});}
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\DoxyCodeLine{02165\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_RXFF(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02167\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6d438200ec45e5fe92171128fcf48437}{USART\_CR1\_RXFFIE}});}
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\DoxyCodeLine{02180\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_ERROR(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02182\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaed1a39c551b1641128f81893ff558d0}{USART\_CR3\_EIE}});}
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\DoxyCodeLine{02191\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_CTS(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02193\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga636d5ec2e9556949fc68d13ad45a1e90}{USART\_CR3\_CTSIE}});}
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\DoxyCodeLine{02202\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_WKUP(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02204\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8006ca5d160f9805977f2c77f146a75c}{USART\_CR3\_WUFIE}});}
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\DoxyCodeLine{02213\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_TXFT(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02215\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga55ca97ca5a14b5dfd06424324a35550f}{USART\_CR3\_TXFTIE}});}
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\DoxyCodeLine{02224\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableIT\_RXFT(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02226\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga49fc035fafb880dadb6a60fdf2ba8795}{USART\_CR3\_RXFTIE}});}
\DoxyCodeLine{02227\ \}}
\DoxyCodeLine{02228\ }
\DoxyCodeLine{02235\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_IDLE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02236\ \{}
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\DoxyCodeLine{02238\ \}}
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\DoxyCodeLine{02240\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_IsEnabledIT\_RXNE\ \ LL\_LPUART\_IsEnabledIT\_RXNE\_RXFNE\ }\textcolor{comment}{/*\ Redefinition\ for\ legacy\ purpose\ */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{02248\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_RXNE\_RXFNE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02251\ \}}
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\DoxyCodeLine{02259\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_TC(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02260\ \{}
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\DoxyCodeLine{02262\ \}}
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\DoxyCodeLine{02264\ \textcolor{preprocessor}{\#define\ LL\_LPUART\_IsEnabledIT\_TXE\ \ LL\_LPUART\_IsEnabledIT\_TXE\_TXFNF\ }\textcolor{comment}{/*\ Redefinition\ for\ legacy\ purpose\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02265\ }
\DoxyCodeLine{02272\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_TXE\_TXFNF(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
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\DoxyCodeLine{02275\ \}}
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\DoxyCodeLine{02283\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_PE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02284\ \{}
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\DoxyCodeLine{02286\ \}}
\DoxyCodeLine{02287\ }
\DoxyCodeLine{02294\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_CM(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02295\ \{}
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\DoxyCodeLine{02297\ \}}
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\DoxyCodeLine{02305\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_TXFE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02306\ \{}
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\DoxyCodeLine{02308\ \}}
\DoxyCodeLine{02309\ }
\DoxyCodeLine{02316\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_RXFF(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02317\ \{}
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\DoxyCodeLine{02319\ \}}
\DoxyCodeLine{02320\ }
\DoxyCodeLine{02327\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_ERROR(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02328\ \{}
\DoxyCodeLine{02329\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaed1a39c551b1641128f81893ff558d0}{USART\_CR3\_EIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaed1a39c551b1641128f81893ff558d0}{USART\_CR3\_EIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02330\ \}}
\DoxyCodeLine{02331\ }
\DoxyCodeLine{02338\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_CTS(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02339\ \{}
\DoxyCodeLine{02340\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga636d5ec2e9556949fc68d13ad45a1e90}{USART\_CR3\_CTSIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga636d5ec2e9556949fc68d13ad45a1e90}{USART\_CR3\_CTSIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02341\ \}}
\DoxyCodeLine{02342\ }
\DoxyCodeLine{02349\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_WKUP(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02350\ \{}
\DoxyCodeLine{02351\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8006ca5d160f9805977f2c77f146a75c}{USART\_CR3\_WUFIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8006ca5d160f9805977f2c77f146a75c}{USART\_CR3\_WUFIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02352\ \}}
\DoxyCodeLine{02353\ }
\DoxyCodeLine{02360\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_TXFT(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02361\ \{}
\DoxyCodeLine{02362\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga55ca97ca5a14b5dfd06424324a35550f}{USART\_CR3\_TXFTIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga55ca97ca5a14b5dfd06424324a35550f}{USART\_CR3\_TXFTIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02363\ \}}
\DoxyCodeLine{02364\ }
\DoxyCodeLine{02371\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledIT\_RXFT(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02372\ \{}
\DoxyCodeLine{02373\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga49fc035fafb880dadb6a60fdf2ba8795}{USART\_CR3\_RXFTIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga49fc035fafb880dadb6a60fdf2ba8795}{USART\_CR3\_RXFTIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02374\ \}}
\DoxyCodeLine{02375\ }
\DoxyCodeLine{02379\ }
\DoxyCodeLine{02383\ }
\DoxyCodeLine{02390\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableDMAReq\_RX(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02391\ \{}
\DoxyCodeLine{02392\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\_CR3\_DMAR}});}
\DoxyCodeLine{02393\ \}}
\DoxyCodeLine{02394\ }
\DoxyCodeLine{02401\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableDMAReq\_RX(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02402\ \{}
\DoxyCodeLine{02403\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\_CR3\_DMAR}});}
\DoxyCodeLine{02404\ \}}
\DoxyCodeLine{02405\ }
\DoxyCodeLine{02412\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledDMAReq\_RX(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02413\ \{}
\DoxyCodeLine{02414\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\_CR3\_DMAR}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\_CR3\_DMAR}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02415\ \}}
\DoxyCodeLine{02416\ }
\DoxyCodeLine{02423\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableDMAReq\_TX(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02424\ \{}
\DoxyCodeLine{02425\ \ \ ATOMIC\_SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\_CR3\_DMAT}});}
\DoxyCodeLine{02426\ \}}
\DoxyCodeLine{02427\ }
\DoxyCodeLine{02434\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableDMAReq\_TX(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02435\ \{}
\DoxyCodeLine{02436\ \ \ ATOMIC\_CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\_CR3\_DMAT}});}
\DoxyCodeLine{02437\ \}}
\DoxyCodeLine{02438\ }
\DoxyCodeLine{02445\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledDMAReq\_TX(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02446\ \{}
\DoxyCodeLine{02447\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\_CR3\_DMAT}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\_CR3\_DMAT}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02448\ \}}
\DoxyCodeLine{02449\ }
\DoxyCodeLine{02456\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_EnableDMADeactOnRxErr(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02457\ \{}
\DoxyCodeLine{02458\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae1f1b53b09336e82958755747853a753}{USART\_CR3\_DDRE}});}
\DoxyCodeLine{02459\ \}}
\DoxyCodeLine{02460\ }
\DoxyCodeLine{02467\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_DisableDMADeactOnRxErr(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02468\ \{}
\DoxyCodeLine{02469\ \ \ CLEAR\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae1f1b53b09336e82958755747853a753}{USART\_CR3\_DDRE}});}
\DoxyCodeLine{02470\ \}}
\DoxyCodeLine{02471\ }
\DoxyCodeLine{02478\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_IsEnabledDMADeactOnRxErr(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02479\ \{}
\DoxyCodeLine{02480\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae1f1b53b09336e82958755747853a753}{USART\_CR3\_DDRE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae1f1b53b09336e82958755747853a753}{USART\_CR3\_DDRE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02481\ \}}
\DoxyCodeLine{02482\ }
\DoxyCodeLine{02493\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_LPUART\_DMA\_GetRegAddr(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint32\_t\ Direction)}
\DoxyCodeLine{02494\ \{}
\DoxyCodeLine{02495\ \ \ uint32\_t\ data\_reg\_addr;}
\DoxyCodeLine{02496\ }
\DoxyCodeLine{02497\ \ \ \textcolor{keywordflow}{if}\ (Direction\ ==\ LL\_LPUART\_DMA\_REG\_DATA\_TRANSMIT)}
\DoxyCodeLine{02498\ \ \ \{}
\DoxyCodeLine{02499\ \ \ \ \ \textcolor{comment}{/*\ return\ address\ of\ TDR\ register\ */}}
\DoxyCodeLine{02500\ \ \ \ \ data\_reg\_addr\ =\ (uint32\_t)\ \&(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a315ab2fb3869668e7c5c12e8204efe10}{TDR}});}
\DoxyCodeLine{02501\ \ \ \}}
\DoxyCodeLine{02502\ \ \ \textcolor{keywordflow}{else}}
\DoxyCodeLine{02503\ \ \ \{}
\DoxyCodeLine{02504\ \ \ \ \ \textcolor{comment}{/*\ return\ address\ of\ RDR\ register\ */}}
\DoxyCodeLine{02505\ \ \ \ \ data\_reg\_addr\ =\ (uint32\_t)\ \&(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a8d538b7390289142b70428c5b0af0a18}{RDR}});}
\DoxyCodeLine{02506\ \ \ \}}
\DoxyCodeLine{02507\ }
\DoxyCodeLine{02508\ \ \ \textcolor{keywordflow}{return}\ data\_reg\_addr;}
\DoxyCodeLine{02509\ \}}
\DoxyCodeLine{02510\ }
\DoxyCodeLine{02514\ }
\DoxyCodeLine{02518\ }
\DoxyCodeLine{02525\ \_\_STATIC\_INLINE\ uint8\_t\ LL\_LPUART\_ReceiveData8(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02526\ \{}
\DoxyCodeLine{02527\ \ \ \textcolor{keywordflow}{return}\ (uint8\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a8d538b7390289142b70428c5b0af0a18}{RDR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaec1e63e26cd15479d01a5f13991e1184}{USART\_RDR\_RDR}})\ \&\ 0xFFU);}
\DoxyCodeLine{02528\ \}}
\DoxyCodeLine{02529\ }
\DoxyCodeLine{02536\ \_\_STATIC\_INLINE\ uint16\_t\ LL\_LPUART\_ReceiveData9(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02537\ \{}
\DoxyCodeLine{02538\ \ \ \textcolor{keywordflow}{return}\ (uint16\_t)(READ\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a8d538b7390289142b70428c5b0af0a18}{RDR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaec1e63e26cd15479d01a5f13991e1184}{USART\_RDR\_RDR}}));}
\DoxyCodeLine{02539\ \}}
\DoxyCodeLine{02540\ }
\DoxyCodeLine{02548\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_TransmitData8(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint8\_t\ Value)}
\DoxyCodeLine{02549\ \{}
\DoxyCodeLine{02550\ \ \ LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a315ab2fb3869668e7c5c12e8204efe10}{TDR}}\ =\ Value;}
\DoxyCodeLine{02551\ \}}
\DoxyCodeLine{02552\ }
\DoxyCodeLine{02560\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_TransmitData9(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ uint16\_t\ Value)}
\DoxyCodeLine{02561\ \{}
\DoxyCodeLine{02562\ \ \ LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a315ab2fb3869668e7c5c12e8204efe10}{TDR}}\ =\ Value\ \&\ 0x1FFUL;}
\DoxyCodeLine{02563\ \}}
\DoxyCodeLine{02564\ }
\DoxyCodeLine{02568\ }
\DoxyCodeLine{02572\ }
\DoxyCodeLine{02579\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_RequestBreakSending(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02580\ \{}
\DoxyCodeLine{02581\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2d1a36c6b492c425b4e5cc94d983ecf1}{USART\_RQR\_SBKRQ}});}
\DoxyCodeLine{02582\ \}}
\DoxyCodeLine{02583\ }
\DoxyCodeLine{02590\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_RequestEnterMuteMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02591\ \{}
\DoxyCodeLine{02592\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2aae0f4fb0a74822ce212ea7d9b8463a}{USART\_RQR\_MMRQ}});}
\DoxyCodeLine{02593\ \}}
\DoxyCodeLine{02594\ }
\DoxyCodeLine{02603\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_RequestRxDataFlush(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02604\ \{}
\DoxyCodeLine{02605\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7b148ee7c697bbcf836648063613612a}{USART\_RQR\_RXFRQ}});}
\DoxyCodeLine{02606\ \}}
\DoxyCodeLine{02607\ }
\DoxyCodeLine{02618\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_LPUART\_RequestTxDataFlush(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx)}
\DoxyCodeLine{02619\ \{}
\DoxyCodeLine{02620\ \ \ SET\_BIT(LPUARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa40d2e52b5955b30c9399eb3dec769e8}{USART\_RQR\_TXFRQ}});}
\DoxyCodeLine{02621\ \}}
\DoxyCodeLine{02622\ }
\DoxyCodeLine{02626\ }
\DoxyCodeLine{02627\ \textcolor{preprocessor}{\#if\ defined(USE\_FULL\_LL\_DRIVER)}\textcolor{preprocessor}{}}
\DoxyCodeLine{02631\ ErrorStatus\ LL\_LPUART\_DeInit(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx);}
\DoxyCodeLine{02632\ ErrorStatus\ LL\_LPUART\_Init(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *LPUARTx,\ \textcolor{keyword}{const}\ LL\_LPUART\_InitTypeDef\ *LPUART\_InitStruct);}
\DoxyCodeLine{02633\ \textcolor{keywordtype}{void}\ \ \ \ \ \ \ \ LL\_LPUART\_StructInit(LL\_LPUART\_InitTypeDef\ *LPUART\_InitStruct);}
\DoxyCodeLine{02637\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USE\_FULL\_LL\_DRIVER\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02638\ }
\DoxyCodeLine{02642\ }
\DoxyCodeLine{02646\ }
\DoxyCodeLine{02647\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ LPUART1\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02648\ }
\DoxyCodeLine{02652\ }
\DoxyCodeLine{02653\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
\DoxyCodeLine{02654\ \}}
\DoxyCodeLine{02655\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{02656\ }
\DoxyCodeLine{02657\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ STM32H7xx\_LL\_LPUART\_H\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02658\ }

\end{DoxyCode}
